MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 422

IC MCU 128K FLASH 25MHZ 112-LQFP

MC9S12E128CPVE

Manufacturer Part Number
MC9S12E128CPVE
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
90
Ram Memory Size
8KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 13 Timer Module (TIM16B4CV1)
13.3.2.1
Read: Anytime
Write: Anytime
13.3.2.2
Read: Anytime but will always return 0x0000 (1 state is transient)
Write: Anytime
422
FOC[7:4]
IOS[7:4]
Reset
Reset
Field
Field
7:4
7:4
W
W
R
R
FOC7
IOS7
Input Capture or Output Compare Channel Configuration
0 The corresponding channel acts as an input capture.
1 The corresponding channel acts as an output compare.
Force Output Compare Action for Channel 7:4 — A write to this register with the corresponding data bit(s) set
causes the action which is programmed for output compare “x” to occur immediately. The action taken is the
same as if a successful comparison had just taken place with the TCx register except the interrupt flag does not
get set.
Note: A successful channel 7 output compare overrides any channel 6:4 compares. If forced output compare on
Timer Input Capture/Output Compare Select (TIOS)
Timer Compare Force Register (CFORC)
0
0
0
7
7
any channel occurs at the same time as the successful output compare then forced output compare action
will take precedence and interrupt flag won’t get set.
Figure 13-6. Timer Input Capture/Output Compare Select (TIOS)
FOC6
IOS6
0
0
0
6
6
Figure 13-7. Timer Compare Force Register (CFORC)
Table 13-3. CFORC Field Descriptions
Table 13-2. TIOS Field Descriptions
FOC5
IOS5
MC9S12E128 Data Sheet, Rev. 1.07
0
0
0
5
5
FOC4
IOS4
0
0
0
4
4
Description
Description
0
0
0
0
3
3
0
0
0
0
2
2
Freescale Semiconductor
0
0
0
0
1
1
0
0
0
0
0
0

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