MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 529

IC MCU 128K FLASH 25MHZ 112-LQFP

MC9S12E128CPVE

Manufacturer Part Number
MC9S12E128CPVE
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
90
Ram Memory Size
8KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Freescale Semiconductor
MOD[C:A]
Field
EMK
EME
IVIS
7:5
3
1
0
Mode Select Bits — These bits indicate the current operating mode.
If MODA = 1, then MODC, MODB, and MODA are write never.
If MODC = MODA = 0, then MODC, MODB, and MODA are writable with the exception that you cannot change
to or from special peripheral mode
If MODC = 1, MODB = 0, and MODA = 0, then MODC is write never. MODB and MODA are write once, except
that you cannot change to special peripheral mode. From normal single-chip, only normal expanded narrow and
normal expanded wide modes are available.
See
Internal Visibility (for both read and write accesses) — This bit determines whether internal accesses
generate a bus cycle that is visible on the external bus.
Normal: write once
Emulation: write never
Special: write anytime
0 No visibility of internal bus operations on external bus.
1 Internal bus operations are visible on external bus.
Emulate Port K
Normal: write once
Emulation: write never
Special: write anytime
0 PORTK and DDRK are in the memory map so port K can be used for general-purpose I/O.
1 If in any expanded mode, PORTK and DDRK are removed from the memory map.
In single-chip modes, PORTK and DDRK are always in the map regardless of the state of this bit.
In special peripheral mode, PORTK and DDRK are never in the map regardless of the state of this bit.
Emulate Port E
Normal and Emulation: write never
Special: write anytime
0 PORTE and DDRE are in the memory map so port E can be used for general-purpose I/O.
1 If in any expanded mode or special peripheral mode, PORTE and DDRE are removed from the memory map.
In single-chip modes, PORTE and DDRE are always in the map regardless of the state of this bit.
Removing the registers from the map allows the user to emulate the function of these registers externally.
Table 18-8
and
Table
18-16.
Table 18-7. MODE Field Descriptions
MC9S12E128 Data Sheet, Rev. 1.07
Description
Chapter 18 Multiplexed External Bus Interface (MEBIV3)
529

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