MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 577

IC MCU 128K FLASH 25MHZ 112-LQFP

MC9S12E128CPVE

Manufacturer Part Number
MC9S12E128CPVE
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
90
Ram Memory Size
8KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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K
A.3.3
The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO)
is also the system clock source in self clock mode.
A.3.3.1
This section describes the selection of the XFC components to achieve a good filter characteristics.
The following procedure can be used to calculate the resistance and capacitance values using typical values
for K
The grey boxes show the calculation for f
for f
The VCO Gain at the desired VCO frequency is approximated by:
K
The phase detector relationship is given by:
i
Freescale Semiconductor
ch
V
is the current in tracking mode.
OSC
=
1
=
, f
K
1
= 4MHz and a 25MHz bus clock.
and i
1
i
ch
Phase Locked Loop
XFC Component Selection
e
ch
----------------------- -
f
K
K
from
1
f
1
osc
V
f
1V
vco
Table
=
refdv+1
A-13.
100
= 316.7Hz/
1
Figure A-2. Basic PLL functional diagram
e
MC9S12E128 Data Sheet, Rev. 1.07
----------------------
f
60 50
ref
VDDPLL
VCO
100
= 50MHz and f
= -90.48MHz/V
f
cmp
C
C
p
Loop Divider
s
Detector
Phase
synr+1
K
ref
1
R
= 1MHz. E.g., these frequencies are used
XFC Pin
Appendix A Electrical Characteristics
1
2
VCO
K
V
f
vco
577

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