MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 77

IC MCU 128K FLASH 25MHZ 112-LQFP

MC9S12E128CPVE

Manufacturer Part Number
MC9S12E128CPVE
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
90
Ram Memory Size
8KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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an external program (again through BDM commands). Note that if the part goes through a reset before the
security bits are reprogrammed to the unsecure state, the part will be secured again.
1.8
The microcontroller features three main low power modes. Consult the respective block description
chapter for information on the module behavior in Stop, Pseudo Stop, and Wait Mode. An important source
of information about the clock system is the Clock and Reset Generator (CRG) block description chapter.
1.8.1
Executing the CPU STOP instruction stops all clocks and the oscillator thus putting the chip in fully static
mode. Wake up from this mode can be done via reset or external interrupts.
1.8.2
This mode is entered by executing the CPU STOP instruction. In this mode the oscillator is still running
and the Real Time Interrupt (RTI) or Watchdog (COP) sub module can stay active. Other peripherals are
turned off. This mode consumes more current than the full STOP mode, but the wake up time from this
mode is significantly shorter.
1.8.3
This mode is entered by executing the CPU WAI instruction. In this mode the CPU will not execute
instructions. The internal CPU signals (address and data bus) will be fully static. All peripherals stay
active. For further power consumption the peripherals can individually turn off their local clocks.
1.8.4
Although this is not a low power mode, unused peripheral modules should not be enabled in order to save
power.
1.9
Consult the Exception Processing section of the CPU12 Reference Manual for information on resets and
interrupts. System resets can be generated through external control of the RESET pin, through the clock
and reset generator module CRG or through the low voltage reset (LVR) generator of the voltage regulator
module. Refer to the CRG and VREG block description chapters for detailed information on reset
generation.
1.9.1
Table 1-9
Freescale Semiconductor
Low Power Modes
Resets and Interrupts
lists interrupt sources and vectors in default order of priority.
Stop
Pseudo Stop
Wait
Run
Vectors
MC9S12E128 Data Sheet, Rev. 1.07
Chapter 1 MC9S12E128 Device Overview (MC9S12E128DGV1)
77

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