HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 43
HD64F38024DV
Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets
1.US38024-BAG1.pdf
(684 pages)
2.DF36012GFYV.pdf
(1021 pages)
3.DF38102HV.pdf
(145 pages)
Specifications of HD64F38024DV
Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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CAse: Switch Statement Output Code Selection Method
C/C++ <Optimize>[Switch statement :]
The speed=inline=<numeric value> modifies the maximum size of the target function for
inline expansion. If CPU is H8SX or H8S(without legacy=v4 option), <numeric value> means
the percentage of increase in program size allowed by inline expansion. For example, with
speed=inline=50, inline expansion is performed up to 50% increase in program size, or up to
1.5 times larger.
If CPU is H8/300, H8/300H or H8S(with legacy=v4 option), <numeric value> is specified as
the number of function nodes (total number of words consisting of variables and operators
except for definitions). This means that functions smaller than the threshold shown by the
<numeric value> are expanded. Here, the amount of program size increase depends on the size
of the function to be expanded and the frequency of the calls of those functions. Hence the
upper bound of the increase cannot be explicitly specified as can in H8SX or H8S(without
legacy=v4 option).
If <numeric value> is omitted, 100 is assumed if the CPU type is H8SX or H8S, and 110 is
assumed otherwise.
For details on the conditions of inline expansion, refer to the description on the in-line
expansion of functions in section 10.2.1 (2), Extended Specifications Related to Functions.
The speed=struct option expands structure-type or double-type assignment to a code that does
not use run-time routines.
The speed=expression option expands arithmetic operation, comparison, and assignment
expressions to a code that does not use run-time routines (some expressions are excluded from
this option).
If only speed is specified, optimization for speed is performed for speed=register, shift, loop,
switch, inline, struct, and expression. If this option is not specified, the compiler optimizes
for size instead of speed.
Remarks
When no optimization (optimize=0) is specified, speed=loop or inline is invalid.
Command Line Format
CAse = { Auto | Ifthen | Table }
Description
Specifies a switch-statement-output code-selection method.
When case=auto is specified, the compiler automatically selects an optimization method to
reduce the size of the object code.
If speed or speed=switch is specified, the compiler automatically selects optimization for
speed.
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