MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 1025

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PER0AD1[15:8]
RDR1AD1[7:0]
Reset
Reset
24.0.5.63 Port AD1 Reduced Drive Register 1 (RDR1AD1)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each PAD[7:0] output pin as either full or reduced. If
the port is used as input this bit is ignored.
24.0.5.64 Port AD1 Pull Up Enable Register 0 (PER0AD1)
Read: Anytime.
Write: Anytime.
This register activates a pull-up device on the respective PAD[15:8] pin if the port is used as input.
This bit has no effect if the port is used as output. Out of reset no pull-up device is enabled.
Field
Field
W
W
R
7–0
R
7–0
PER0AD115 PER0AD114 PER0AD113 PER0AD112 PER0AD111 PER0AD110 PER0AD19
RDR1AD17
7
0
7
0
Reduced Drive Port AD1 Register 1
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Pull Device Enable Port AD1 Register 0
0 Pull-up device is disabled.
1 Pull-up device is enabled.
RDR1AD16
Figure 24-65. Port AD1 Reduced Drive Register 1 (RDR1AD1)
Figure 24-66. Port AD1 Pull Up Enable Register 0 (PER0AD1)
0
0
6
6
Table 24-57. RDR1AD1 Field Descriptions
Table 24-58. PER0AD1 Field Descriptions
RDR1AD15
5
0
5
0
RDR1AD14
0
0
4
4
Description
Description
RDR1AD13
3
0
3
0
RDR1AD12
0
0
2
2
RDR1AD11
1
0
1
0
RDR1AD10
PER0AD18
0
0
0
0

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