MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 1072

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 26 4 Kbyte EEPROM Module (S12XEETX4KV2)
26.1.4
A block diagram of the EEPROM module is shown in
26.2
The EEPROM module contains no signals that connect off-chip.
26.3
This section describes the memory map and registers for the EEPROM module.
26.3.1
The EEPROM memory map is shown in
memory addresses between global addresses 0x13_F000 and 0x13_FFFF. The EPROT register, described
in
EEPROM memory from accidental program or erase. The EEPROM addresses covered by this protectable
1074
Section 26.3.2.5, “EEPROM Protection Register
Oscillator
Clock
Command
Request
Interrupt
External Signal Description
Memory Map and Register Definition
Block Diagram
Module Memory Map
EETX4K
Clock
Divider
Command Pipeline
cmd2
addr2
data2
Figure 26-1. EETX4K Block Diagram
MC9S12XDP512 Data Sheet, Rev. 2.21
EEPROM
Interface
Registers
Protection
Figure
EECLK
cmd1
addr1
data1
26-2. The HCS12X architecture places the EEPROM
(EPROT)”, can be set to protect the upper region in the
Figure
26-1.
2K * 16 Bits
EEPROM
sector 1023
sector 0
sector 1
Freescale Semiconductor

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