MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 1225

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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29.5
29.5.1
If a command is active (CCIF = 0) when the MCU enters wait mode, the active command and any buffered
command will be completed.
The Flash module can recover the MCU from wait mode if the CBEIF and CCIF interrupts are enabled
(see
29.5.2
If a command is active (CCIF = 0) when the MCU enters stop mode, the operation will be aborted and, if
the operation is program or erase, the Flash array data being programmed or erased may be corrupted and
the CCIF and ACCERR flags will be set. If active, the high voltage circuitry to the Flash memory will
immediately be switched off when entering stop mode. Upon exit from stop mode, the CBEIF flag is set
and any buffered command will not be launched. The ACCERR flag must be cleared before starting a
command write sequence (see
29.5.3
In background debug mode (BDM), the FPROT register is writable. If the MCU is unsecured, then all
Flash commands listed in
mode, only mass erase can be executed.
29.6
The Flash module provides the necessary security information to the MCU. After each reset, the Flash
module determines the security state of the MCU as defined in
(FSEC)”.
The contents of the Flash security byte at 0x7F_FF0F in the Flash Configuration Field must be changed
directly by programming 0x7F_FF0F when the MCU is unsecured and the higher address sector is
unprotected. If the Flash security byte is left in a secured state, any reset will cause the MCU to initialize
to a secure operating mode.
29.6.1
The MCU may be unsecured by using the backdoor key access feature which requires knowledge of the
contents of the backdoor keys (four 16-bit words programmed at addresses 0x7F_FF00–0x7F_FF07). If
the KEYEN[1:0] bits are in the enabled state (see
the KEYACC bit is set, a write to a backdoor key address in the Flash memory triggers a comparison
Freescale Semiconductor
Section 29.8,
Operating Modes
Flash Module Security
Wait Mode
Stop Mode
Background Debug Mode
Unsecuring the MCU using Backdoor Key Access
As active commands are immediately aborted when the MCU enters stop
mode, it is strongly recommended that the user does not use the STOP
instruction during program or erase operations.
“Interrupts”).
Table 29-18
Section 29.4.1.2, “Command Write
MC9S12XDP512 Data Sheet, Rev. 2.21
can be executed. If the MCU is secured and is in special single chip
Section 29.3.2.2, “Flash Security Register
NOTE
Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
Section 29.3.2.2, “Flash Security Register
Sequence”).
(FSEC)”) and
1227

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