MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 1232

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 30 Security (S12X9SECV2)
30.1.4.1
30.1.4.2
Special single chip mode means BDM is active after reset. The availability of BDM firmware commands
depends on the security state of the device. The BDM secure firmware first performs a blank check of both
the Flash memory and the EEPROM. If the blank check succeeds, security will be temporarily turned off
and the state of the security bits in the appropriate Flash memory location can be changed If the blank
check fails, security will remain active, only the BDM hardware commands will be enabled, and the
accessible memory space is restricted to the peripheral register area. This will allow the BDM to be used
to erase the EEPROM and Flash memory without giving access to their contents. After erasing both Flash
memory and EEPROM, another reset into special single chip mode will cause the blank check to succeed
and the options/security byte can be programmed to “unsecured” state via BDM.
While the BDM is executing the blank check, the BDM interface is completely blocked, which means that
all BDM commands are temporarily blocked.
30.1.4.3
1234
Background debug module (BDM) operation is completely disabled.
Execution of Flash and EEPROM commands is restricted. Please refer to the NVM block guide
(FTX) for details.
Tracing code execution using the DBG module is disabled.
Debugging XGATE code (breakpoints, single-stepping) is disabled.
BDM firmware commands are disabled.
BDM hardware commands are restricted to the register space.
Execution of Flash and EEPROM commands is restricted. Please refer to the NVM block guide
(FTX) for details.
Tracing code execution using the DBG module is disabled.
Debugging XGATE code (breakpoints, single-stepping) is disabled.
BDM operation is completely disabled.
Internal Flash memory and EEPROM are disabled.
Execution of Flash and EEPROM commands is restricted. Please refer to the NVM block guide
(FTX) for details.
Tracing code execution using the DBG module is disabled.
Debugging XGATE code (breakpoints, single-stepping) is disabled.
Normal Single Chip Mode (NS)
Special Single Chip Mode (SS)
Expanded Modes (NX, ES, EX, and ST)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor

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