MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 1333

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0x0200–0x023F Freescale Scalable CAN — MSCAN (CAN3) (continued)
0x0240–0x027F Port Integration Module PIM_9DX (PIM) Map (Sheet 1 of 4)
Freescale Semiconductor
Address
Address
0x0220–
0x0230–
0x021C
0x021D
0x021A
0x021B
0x021E
0x021F
0x022F
0x023F
0x0216
0x0217
0x0218
0x0219
0x0240
0x0241
0x0242
0x0243
0x0244
0x0245
0x0246
0x0247
CAN3IDMR2
CAN3IDMR3
CAN3IDMR4
CAN3IDMR5
CAN3IDMR6
CAN3IDMR7
CAN3IDAR4
CAN3IDAR5
CAN3IDAR6
CAN3IDAR7
CAN3RXFG
CAN3TXFG
Reserved
Reserved
Name
Name
DDRT
RDRT
PERT
PPST
PTIT
PTT
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
DDRT7
RDRT7
PERT7
PPST7
PTIT7
PTT7
Bit 7
Bit 7
AM7
AM7
AM7
AM7
AM7
AM7
AC7
AC7
AC7
AC7
0
0
(See
(See
MC9S12XDP512 Data Sheet, Rev. 2.21
DDRT7
RDRT6
PERT6
PPST6
PTIT6
PTT6
Bit 6
Bit 6
AM6
AM6
AM6
AM6
AM6
AM6
AC6
AC6
AC6
AC6
0
0
Detailed MSCAN Foreground Receive and Transmit Buffer
Detailed MSCAN Foreground Receive and Transmit Buffer
DDRT5
RDRT5
PERT5
PPST5
PTIT5
PTT5
Bit 5
Bit 5
AM5
AM5
AM5
AM5
AM5
AM5
AC5
AC5
AC5
AC5
FOREGROUND TRANSMIT BUFFER
0
0
FOREGROUND RECEIVE BUFFER
DDRT4
RDRT4
PERT4
PPST4
PTIT4
PTT4
Bit 4
Bit 4
AM4
AM4
AM4
AM4
AM4
AM4
AC4
AC4
AC4
AC4
0
0
DDRT3
RDRT3
PERT3
PPST3
PTIT3
PTT3
Bit 3
Bit 3
AM3
AM3
AM3
AM3
AM3
AM3
AC3
AC3
AC3
AC3
0
0
DDRT2
RDRT2
PERT2
PPST2
PTIT2
PTT2
Appendix G Detailed Register Map
Bit 2
AM2
AM2
AM2
AM2
AM2
AM2
Bit 2
AC2
AC2
AC2
AC2
0
0
DDRT1
RDRT1
PERT1
PPST1
PTIT1
PTT1
Bit 1
Bit 1
AM1
AM1
AM1
AM1
AM1
AM1
AC1
AC1
AC1
AC1
Layout)
Layout)
0
0
DDRT0
RDRT0
PERT0
PPST0
PTIT0
PTT0
Bit 0
Bit 0
AM0
AM0
AM0
AM0
AM0
AM0
AC0
AC0
AC0
AC0
0
0
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