MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 214

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 6 XGATE (S12XGATEV2)
6.8.2.5
This addressing mode is used to identify the position and size of a bit field for insertion or extraction. The
width and offset are coded in the lower byte of the source register 2, RS2. The content of the upper byte is
ignored. An offset of 0 denotes the right most position and a width of 0 denotes 1 bit. These instructions
are very useful to extract, insert, clear, set or toggle portions of a 16 bit word.
6.8.2.6
The XGATE offers a number of additional instructions for flag manipulation, program flow control and
debugging:
214
1. SIF: Set a channel interrupt flag
2. SSEM: Test and set a hardware semaphore
3. CSEM: Clear a hardware semaphore
4. BRK: Software breakpoint
5. NOP: No Operation
6. RTS: Terminate the current thread
BFEXT
Bit Field Operations
Special Instructions for DMA Usage
15
15
R3,R4,R5 ; R5: W4 bits offset O4, will be extracted from R4 into R3
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 6-23. Bit Field Addressing
Bit Field Insert
W4
W4=3, O4=2
5
3
2
O4
Bit Field Extract
0
0
RS2
RS1
RD
Freescale Semiconductor

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