MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 379

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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See
To calculate the output duty cycle (high time as a% of period) for a particular channel:
For boundary case programming values, please refer to
Read: Anytime
Write: Anytime
8.3.2.15
The PWMSDN register provides for the shutdown functionality of the PWM module in the emergency
cases. For proper operation, channel 7 must be driven to the active level for a minimum of two bus clocks.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reset
Reset
Section 8.4.2.3, “PWM Period and Duty”
W
W
R
R
Polarity = 0 (PPOL x =0)
Polarity = 1 (PPOLx = 1)
Duty Cycle = [(PWMPERx-PWMDTYx)/PWMPERx] * 100%
Duty Cycle = [PWMDTYx / PWMPERx] * 100%
PWMIF
Bit 7
PWM Shutdown Register (PWMSDN)
1
0
7
7
Reads of this register return the most recent value written. Reads do not
necessarily return the value of the currently active duty due to the double
buffering scheme.
Depending on the polarity bit, the duty registers will contain the count of
either the high time or the low time. If the polarity bit is one, the output starts
high and then goes low when the duty count is reached, so the duty registers
contain a count of the high time. If the polarity bit is zero, the output starts
low and then goes high when the duty count is reached, so the duty registers
contain a count of the low time.
= Unimplemented or Reserved
PWMIE
Figure 8-16. PWM Channel Duty Registers (PWMDTYx)
1
0
6
6
6
Figure 8-17. PWM Shutdown Register (PWMSDN)
PWMRSTRT
MC9S12XDP512 Data Sheet, Rev. 2.21
1
0
0
5
5
5
for more information.
PWMLVL
NOTE
NOTE
1
0
4
4
4
Section 8.4.2.8, “PWM Boundary
1
0
0
3
3
3
Chapter 8 Pulse-Width Modulator (S12PWM8B8CV1)
PWM7IN
1
0
2
2
2
PWM7INL
1
0
1
1
1
Cases”.
PWM7ENA
Bit 0
1
0
0
0
379

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