MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 420

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
10.1.2
10.1.3
The basic features of the MSCAN are as follows:
1. Depending on the actual bit timing and the clock jitter of the PLL.
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Wake-Up Interrupt Req.
Transmit Interrupt Req.
Receive Interrupt Req.
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Errors Interrupt Req.
Implementation of the CAN protocol — Version 2.0A/B
— Standard and extended data frames
— Zero to eight bytes data length
— Programmable bit rate up to 1 Mbps
— Support for remote frames
Five receive buffers with FIFO storage scheme
Three transmit buffers with internal prioritization using a “local priority” concept
Flexible maskable identifier filter supports two full-size (32-bit) extended identifier filters, or four
16-bit filters, or eight 8-bit filters
Programmable wakeup functionality with integrated low-pass filter
Programmable loopback mode supports self-test operation
Programmable listen-only mode for monitoring of CAN bus
Programmable bus-off recovery functionality
Separate signalling and interrupt capabilities for all CAN receiver and transmitter error states
(warning, error passive, bus-off)
Programmable MSCAN clock source either bus clock or oscillator clock
Oscillator Clock
Block Diagram
Features
Bus Clock
MSCAN
Figure 10-1. MSCAN Block Diagram
MUX
MC9S12XDP512 Data Sheet, Rev. 2.21
Configuration
CANCLK
Registers
Control
Status
and
1
Presc.
Tq Clk
Wake-Up
Low Pass Filter
Message
Buffering
Receive/
Transmit
Filtering
Engine
and
Freescale Semiconductor
RXCAN
TXCAN