MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 424

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
10.3.2
This section describes in detail all the registers and register bits in the MSCAN module. Each description
includes a standard register diagram with an associated figure number. Details of register bit and field
function follow the register diagrams, in bit order. All bits of all registers in this module are completely
synchronous to internal clocks during a register read.
10.3.2.1
The CANCTL0 register provides various control bits of the MSCAN module as described below.
Read: Anytime
424
0x001C–0x001F
0x0018–0x001B
0x0014–0x0017
0x0020–0x002F
0x0030–0x003F
CANIDMR4–7
CANIDAR4–7
CANIDMRx
CANRXFG
CANTXFG
Register
Reset:
Name
W
R
Register Descriptions
MSCAN Control Register 0 (CANCTL0)
RXFRM
The CANCTL0 register, except WUPE, INITRQ, and SLPRQ, is held in the
reset state when the initialization mode is active (INITRQ = 1 and
INITAK = 1). This register is writable again as soon as the initialization
mode is exited (INITRQ = 0 and INITAK = 0).
0
7
R
W
R
W
R
W
R
W
R
W
Bit 7
AM7
AM7
AC7
= Unimplemented
RXACT
Figure 10-3. MSCAN Register Summary (continued)
Figure 10-4. MSCAN Control Register 0 (CANCTL0)
0
6
= Unimplemented or Reserved
AM6
AM6
AC6
6
MC9S12XDP512 Data Sheet, Rev. 2.21
See
See
CSWAI
Section 10.3.3, “Programmer’s Model of Message
Section 10.3.3, “Programmer’s Model of Message
0
5
AM5
AM5
AC5
5
NOTE
SYNCH
0
4
AM4
AM4
AC4
4
TIME
3
0
AM3
AM3
AC3
3
WUPE
u = Unaffected
0
2
AM2
AM2
AC2
2
Storage”
Storage”
Freescale Semiconductor
SLPRQ
0
1
AM1
AM1
AC1
1
INITRQ
Bit 0
AM0
AM0
AC0
1
0

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