MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 522

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 12 Serial Peripheral Interface (S12SPIV4)
12.3.2.3
Read: Anytime
Write: Anytime; writes to the reserved bits have no effect
The baud rate divisor equation is as follows:
The baud rate can be calculated with the following equation:
522
SPPR[2:0]
SPR[2:0]
Reset
Field
6–4
2–0
W
R
SPI Baud Rate Preselection Bits — These bits specify the SPI baud rates as shown in
mode, a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Selection Bits — These bits specify the SPI baud rates as shown in
a change of these bits will abort a transmission in progress and force the SPI system into idle state.
Bidirectional
Bidirectional
SPI Baud Rate Register (SPIBR)
0
0
7
Pin Mode
For maximum allowed baud rates, please refer to the SPI Electrical
Specification in the Electricals chapter of this data sheet.
Normal
Normal
= Unimplemented or Reserved
SPPR2
0
6
SPC0
Baud Rate = BusClock / BaudRateDivisor
BaudRateDivisor = (SPPR + 1) 2
0
1
0
1
Figure 12-5. SPI Baud Rate Register (SPIBR)
Table 12-4. Bidirectional Pin Configurations
Table 12-5. SPIBR Field Descriptions
BIDIROE
SPPR1
MC9S12XDP512 Data Sheet, Rev. 2.21
0
5
X
0
1
X
0
1
Master Mode of Operation
Slave Mode of Operation
MISO not used by SPI
SPPR0
NOTE
0
4
Slave Out
Master In
Slave I/O
Slave In
Description
MISO
(SPR + 1)
0
0
3
MOSI not used by SPI
SPR2
0
2
Master Out
Master I/O
Master In
Slave In
MOSI
Table
Freescale Semiconductor
SPR1
12-6. In master mode,
Table
0
1
12-6. In master
Eqn. 12-1
Eqn. 12-2
SPR0
0
0

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