MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 624

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 17 Memory Mapping Control (S12XMMCV2)
17.3.2.6
Read: Anytime
Write: Anytime
The RAM page index register allows accessing up to (1M minus 2K) bytes of RAM in the global memory
map by using the eight page index bits to page 4 Kbyte blocks into the RAM page window located in the
CPU local memory map from address $1000 to address $1FFF (see
624
Address: 0x0016
Reset
W
R
1
2
Internal means resources inside the MCU are read/written.
Internal Flash means Flash resources inside the MCU are read/written.
Emulation memory means resources inside the emulator are read/written (PRU registers, flash
replacement, RAM, EEPROM and register space are always considered internal).
External application means resources residing outside the MCU are read/written.
The external access stretch mechanism is part of the EBI module (refer to EBI Block Guide for details).
Emulation Single Chip
Emulation Expanded
RP7
Special Single Chip
Normal Single Chip
RAM Page Index Register (RPAGE)
Normal Expanded
1
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Chip Modes
Special Test
Table 17-10. Data Sources when CPU or BDM is Accessing Flash Area
RP6
1
6
Figure 17-11. RAM Page Index Register (RPAGE)
MC9S12XDP512 Data Sheet, Rev. 2.21
RP5
ROMON
1
5
X
X
X
0
1
0
1
1
0
1
CAUTION
RP4
EROMON
1
4
X
X
X
X
X
X
0
1
0
1
RP3
1
3
External Application
External Application
External Application
Emulation Memory
Emulation Memory
DATA SOURCE
Internal Flash
Internal Flash
Internal Flash
Internal Flash
Figure
Internal
RP2
1
2
1-12).
1
Freescale Semiconductor
RP1
0
1
Stretch
N
N
N
N
N
Y
Y
2
RP0
1
0

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