MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 700

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 19 S12X Debug (S12XDBGV2) Module
19.3.1.4
Read: Anytime
Write: Anytime the module is disarmed.
This register configures the comparators for range matching.
702
CDCM[3:2]
ABCM[1:0]
0x0023
Reset
Field
3–2
1–0
W
R
C and D Comparator Match Control — These bits determine the C and D comparator match mapping as
described in
A and B Comparator Match Control — These bits determine the A and B comparator match mapping as
described in
Debug Control Register2 (DBGC2)
0
0
7
TRANGE
TALIGN
Unimplemented or Reserved
11
00
01
10
11
Table
Table
0
0
6
19-14.
19-15.
Table 19-11. TRCMOD Trace Mode Bit Encoding
Table 19-12. TALIGN Trace Alignment Encoding
Figure 19-6. Debug Control Register2 (DBGC2)
TRCMOD
Table 19-10. TRANGE Trace Range Encoding
00
01
10
11
Table 19-13. DBGC2 Field Descriptions
Trace only in range from comparator C to comparator D
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
Trace buffer entries before and after trigger
Trigger at end of stored data
Trigger before storing data
0
0
4
Tracing Source
Description
Description
Reserved
0
3
Description
NORMAL
Reserved
DETAIL
LOOP1
CDCM
0
2
Freescale Semiconductor
0
1
ABCM
0
0