MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 724

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 19 S12X Debug (S12XDBGV2) Module
This describes the format of the information byte used only when tracing from CPU or XGATE in detail
mode. When tracing from the CPU in detail mode, information is stored to the trace buffer on all cycles
except opcode fetch and free cycles. The XGATE entry stored on the same line is a snapshot of the
XGATE program counter. In this case the CSZ and CRW bits indicate the type of access being made by
the CPU, while the XACK and XOCF bits indicate if the simultaneous XGATE cycle is a free cycle (no
bus acknowledge) or opcode fetch cycle. Similarly when tracing from the XGATE in detail mode,
information is stored to the trace buffer on all cycles except opcode fetch and free cycles. The CPU entry
stored on the same line is a snapshot of the CPU program counter. In this case the XSZ and XRW bits
indicate the type of access being made by the XGATE, while the CFREE and COCF bits indicate if the
simultaneous CPU cycle is a free cycle or opcode fetch cycle.
726
COCF
CREE
XACK
Field
CRW
CSZ
XSZ
7
6
5
4
3
2
CFREE
Bit 7
CPU Free Cycle Indicator — This bit indicates if the stored CPU address corresponds to a free cycle. This bit
only contains valid information when tracing the XGATE accesses in detail mode.
0 Stored information corresponds to free cycle
1 Stored information does not correspond to free cycle
Access Type Indicator — This bit indicates if the access was a byte or word size access.This bit only contains
valid information when tracing CPU activity in detail mode.
0 Word Access
1 Byte Access
Read Write Indicator — This bit indicates if the corresponding stored address corresponds to a read or write
access. This bit only contains valid information when tracing CPU activity in detail mode.
0 Write Access
1 Read Access
CPU Opcode Fetch Indicator — This bit indicates if the stored address corresponds to an opcode fetch cycle.
This bit only contains valid information when tracing the XGATE accesses in detail mode.
0 Stored information does not correspond to opcode fetch cycle
1 Stored information corresponds to opcode fetch cycle
XGATE Access Indicator — This bit indicates if the stored XGATE address corresponds to a free cycle. This
bit only contains valid information when tracing the CPU accesses in detail mode.
0 Stored information corresponds to free cycle
1 Stored information does not correspond to free cycle
Access Type Indicator — This bit indicates if the access was a byte or word size access. This bit only contains
valid information when tracing XGATE activity in detail mode.
0 Word Access
1 Byte Access
Bit 6
CSZ
CRW
Bit 5
Table 19-42. CXINF Field Descriptions
Figure 19-26. Information Byte CXINF
MC9S12XDP512 Data Sheet, Rev. 2.21
COCF
Bit 4
Description
XACK
Bit 3
Bit 2
XSZ
XRW
Bit 1
Freescale Semiconductor
XOCF
Bit 0