MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 828

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.5
Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other
modes the data source is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
22.3.2.6
Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other
modes the data source is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
830
PC[7:0]
PD[7:0]
Reset
Reset
Field
Field
Exp.:
Exp.:
7–0
7–0
W
W
R
R
DATA15
DATA7
PC7
Port C — Port C pins 7–0 are associated with data I/O lines DATA15 through DATA8 respectively in expanded
modes. When this port is not used for external data, these pins can be used as general purpose I/O. If the data
direction bits of the associated I/O pins are set to logic level “1”, a read returns the value of the port register,
otherwise the buffered pin input state is read.
PD7
Port D — Port D pins 7–0 are associated with data I/O lines DATA7 through DATA0 respectively in expanded
modes. When this port is not used for external data, these pins can be used as general purpose I/O. — If the
data direction bits of the associated I/O pins are set to logic level “1”, a read returns the value of the port register,
otherwise the buffered pin input state is read.
Port C Data Register (PORTC)
Port D Data Register (PORTD)
0
0
7
7
DATA14
DATA6
PC6
PD6
0
0
6
6
Figure 22-7. Port C Data Register (PORTC)
Figure 22-8. Port D Data Register (PORTD)
Table 22-8. PORTC Field Descriptions
Table 22-9. PORTD Field Descriptions
DATA13
MC9S12XDP512 Data Sheet, Rev. 2.21
DATA5
PC5
PD5
0
0
5
5
DATA12
DATA4
PC4
PD4
0
0
4
4
Description
Description
DATA11
DATA3
PC3
PD3
0
0
3
3
DATA10
DATA2
PC2
PD2
0
0
2
2
Freescale Semiconductor
DATA9
DATA1
PC1
PD1
0
0
1
1
DATA8
DATA0
PC0
PD0
0
0
0
0

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