MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 86

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 2 Clocks and Reset Generator (S12CRGV6)
2.3.2.3
This register is reserved for factory testing of the CRG module and is not available in normal modes.
Read: Always reads 0x_00 in normal modes
Write: Unimplemented in normal modes
2.3.2.4
This register provides CRG status bits and flags.
Read: Anytime
Write: Refer to each bit for individual write conditions
86
Reset
Reset
PORF
Field
RTIF
7
6
W
W
R
R
1. PORF is set to 1 when a power on reset occurs. Unaffected by system reset.
2. LVRF is set to 1 when a low-voltage reset occurs. Unaffected by system reset.
RTIF
Real Time Interrupt Flag — RTIF is set to 1 at the end of the RTI period. This flag can only be cleared by writing
a 1. Writing a 0 has no effect. If enabled (RTIE = 1), RTIF causes an interrupt request.
0 RTI time-out has not yet occurred.
1 RTI time-out has occurred.
Power on Reset Flag — PORF is set to 1 when a power on reset occurs. This flag can only be cleared by writing
a 1. Writing a 0 has no effect.
0 Power on reset has not occurred.
1 Power on reset has occurred.
Reserved Register (CTFLG)
CRG Flags Register (CRGFLG)
0
0
0
7
7
Writing to this register when in special mode can alter the CRG
fucntionality.
= Unimplemented or Reserved
= Unimplemented or Reserved
PORF
0
0
6
6
1
Figure 2-7. CRG Flags Register (CRGFLG)
Figure 2-6. Reserved Register (CTFLG)
Table 2-2. CRGFLG Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
LVRF
0
0
5
5
2
LOCKIF
NOTE
0
0
0
4
4
Description
LOCK
0
0
0
3
3
TRACK
0
0
0
2
2
Freescale Semiconductor
SCMIF
0
0
0
1
1
SCM
0
0
0
0
0