MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 877

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.3.2.70 Port AD1 Reduced Drive Register 0 (RDR0AD1)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each PAD[23:16] output pin as either full or reduced. If the
port is used as input this bit is ignored.
22.3.2.71 Port AD1 Reduced Drive Register 1 (RDR1AD1)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each PAD[15:08] output pin as either full or reduced. If the
port is used as input this bit is ignored.
Freescale Semiconductor
RDR0AD1[23:16]
RDR1AD1[15:8]
Reset
Reset
Field
Field
W
W
R
7–0
R
7–0
RDR0AD123 RDR0AD122 RDR0AD121 RDR0AD120 RDR0AD119 RDR0AD118 RDR0AD117 RDR0AD116
RDR1AD115 RDR1AD114 RDR1AD113 RDR1AD112 RDR1AD111 RDR1AD110 RDR1AD19
0
0
7
7
Reduced Drive Port AD1 Register 0
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Reduced Drive Port AD1 Register 1
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Figure 22-72. Port AD1 Reduced Drive Register 0 (RDR0AD1)
Figure 22-73. Port AD1 Reduced Drive Register 1 (RDR1AD1)
0
0
6
6
Table 22-63. RDR0AD1 Field Descriptions
Table 22-64. RDR1AD1 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
5
0
0
4
4
Description
Description
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
0
0
3
3
0
0
2
2
0
0
1
1
RDR1AD18
0
0
0
0
879