MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 886

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
A valid edge on an input is detected if 4 consecutive samples of a passive level are followed by
4 consecutive samples of an active level directly or indirectly.
The filters are continuously clocked by the bus clock in run and wait mode. In stop mode, the clock is
generated by an RC-oscillator in the port integration module. To maximize current saving the RC
oscillator runs only if the following condition is true on any pin individually:
Sample count <= 4 and interrupt enabled (PIE = 1) and interrupt flag not set (PIF = 0).
22.4.4
All peripheral ports T, S, M, P, H, J, AD0, and AD1 start up as general purpose inputs after reset.
Depending on the external mode pin condition, the external bus interface related ports A, B, C, D, E, and
K start up as general purpose inputs on reset or are configured for their alternate functions.
Table 22-70
are displayed, a ‘mux’ indicates time-multiplexing between the two functions and an ‘or’ means that a
configuration bit exists which can be altered after reset to select the respective function (displayed in
italics). Refer to S12X_EBI section for details.
888
PC[7:0]
PD[7:0]
PK[6:4]
PK[3:0]
PB[7:1]
PA[7:0]
PK7
PB0
PE7
Pin
Single-Chip
Expanded Bus Pin Functions
lists the pin functions in relationship with the different operating modes. If two entries per pin
ECLKX2
Normal
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
or
Single-Chip Modes
Table 22-70. Expanded Bus Pin Functions versus Operating Modes
Single-Chip
ECLKX2
Special
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
or
MC9S12XDP512 Data Sheet, Rev. 2.21
ADDR[22:20]
ADDR[19:16]
ADDR[15:8]
DATA[15:8]
Expanded
ADDR[7:1]
DATA[7:0]
ECLKX2
Normal
EWAIT
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
UDS
or
or
or
or
or
or
or
or
ADDR[22:20]
ADDR[19:16]
Single-Chip
ADDR[15:8]
IQSTAT[3:0]
Emulation
DATA[15:8]
ADDR[7:1]
DATA[7:0]
IVD[15:8]
ACC[2:0]
ECLKX2
IVD[7:1]
ADDR0
GPIO
IVD0
mux
mux
mux
mux
mux
Expanded Modes
ADDR[22:20]
ADDR[19:16]
IQSTAT[3:0]
ADDR[15:8]
DATA[15:8]
Emulation
Expanded
ADDR[7:1]
DATA[7:0]
IVD[15:8]
ACC[2:0]
ECLKX2
IVD[7:1]
ADDR0
EWAIT
GPIO
IVD0
mux
mux
mux
mux
mux
or
Freescale Semiconductor
ADDR[22:20]
ADDR[19:16]
ADDR[15:8]
DATA[15:8]
ADDR[7:1]
DATA[7:0]
ECLKX2
Special
ADDR0
GPIO
GPIO
GPIO
Test
or
or

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