MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 931

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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RDRT[7:0]
PERT[7:0]
Reset
Reset
This register configures the drive strength of each port T output pin as either full or reduced. If the
port is used as input this bit is ignored.
Field
23.0.5.21 Port T Pull Device Enable Register (PERT)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as
input. This bit has no effect if the port is used as output. Out of reset no pull device is enabled.
Field
23.0.5.22 Port T Polarity Select Register (PPST)
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
7–0
7–0
W
W
R
R
PERT7
PPST7
Reduced Drive Port T
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Pull Device Enable Port T
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
7
0
7
0
PERT6
PPST6
Figure 23-23. Port T Pull Device Enable Register (PERT)
0
0
6
6
Figure 23-24. Port T Polarity Select Register (PPST)
Table 23-24. RDRT Field Descriptions
Table 23-25. PERT Field Descriptions
PERT5
PPST5
5
0
5
0
PERT4
PPST4
0
0
4
4
Description
Description
PERT3
PPST3
3
0
3
0
PERT2
PPST2
0
0
2
2
PERT1
PPST1
1
0
1
0
PERT0
PPST0
0
0
0
0

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