MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 936

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 23 DQ256 Port Integration Module (S12XDQ256PIMV2)
23.0.5.30 Port M Data Register (PTM)
Read: Anytime.
Write: Anytime.
Port M pins 7–0 are associated with the CAN0, CAN1, CAN2, as well as the routed CAN0, CAN4, and
SPI0 modules. When not used with any of the peripherals, these pins can be used as general purpose I/O.
If the data direction bits of the associated I/O pins are set to logic level “1”, a read returns the value of the
port register, otherwise the buffered pin input state is read.
938
Routed
Routed
Routed
PTM[7:6]
PTM[5:4]
PTM[3:2]
PTM[1:0]
CAN0
CAN4
Reset
Field
SPI0
CAN
7–6
5–4
3–2
1–0
W
R
TXCAN4
PTM7
The CAN4 function (TXCAN4 and RXCAN4) takes precedence over the general purpose I/O function if the CAN4
module is enabled. Refer to MSCAN section for details.
The CAN2 function (TXCAN2 and RXCAN2) takes precedence over the routed CAN0, routed CAN4, the routed
SPI0 and the general purpose I/O function if the CAN2 module is enabled.
The routed CAN0 function (TXCAN0 and RXCAN0) takes precedence over the routed CAN4, the routed SPI0
and the general purpose I/O function if the routed CAN0 module is enabled.
The routed CAN4 function (TXCAN4 and RXCAN4) takes precedence over the routed SPI0 and general purpose
I/O function if the routed CAN4 module is enabled. Refer to MSCAN section for details.
The routed SPI0 function (SCK0 and MOSI0) takes precedence of the general purpose I/O function if the routed
SPI0 is enabled. Refer to SPI section for details.
The CAN1 function (TXCAN1 and RXCAN1) takes precedence over the routed CAN0, the routed SPI0 and the
general purpose I/O function if the CAN1 module is enabled.The routed CAN0 function (TXCAN0 and RXCAN0)
takes precedence over the routed SPI0 and the general purpose I/O function if the routed CAN0 module is
enabled. Refer to MSCAN section for details.
The routed SPI0 function (SS0 and MISO0) takes precedence of the general purpose I/O function if the routed
SPI0 is enabled and not in bidirectional mode. Refer to SPI section for details.
The CAN0 function (TXCAN0 and RXCAN0) takes precedence over the general purpose I/O function if the CAN0
module is enabled. Refer to MSCAN section for details.
0
7
RXCAN4
PTM6
0
6
Figure 23-32. Port M Data Register (PTM)
TXCAN2
TXCAN0
TXCAN4
Table 23-32. PTM Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
PTM5
SCK0
0
5
RXCAN2
RXCAN0
RXCAN4
MOSI0
PTM4
0
4
Description
TXCAN1
TXCAN0
PTM3
SS0
0
3
RXCAN1
RXCAN0
MISO0
PTM2
0
2
TXCAN0
Freescale Semiconductor
PTM1
0
1
RXCAN0
PTM0
0
0