MC56F8345VFGE Freescale Semiconductor, MC56F8345VFGE Datasheet - Page 17

• Manufacturer Part Number: MC56F8345VFGE
• Description: IC DSP 16BIT 60MHZ 128-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8345VFGE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 49
• Program Memory Size: 136KB (68K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 128-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 49
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Part 2 Signal/Connection Descriptions
2.1 Introduction
The input and output signals of the 56F8345 and 56F8145 are organized into functional groups, as detailed
in
present on a pin.
Freescale Semiconductor
Preliminary
Table 2-1
1. If the on-chip regulator is disabled, the V
2. Alternately, can function as Quad Timer pins or GPIO
3. Pins in this section can function as Quad Timer, SPI 1, orGPIO
4. EMI not functional in these packages; use as GPIO pins.
Note: See
Power (V
Power Option Control
Ground (V
Supply Capacitors
PLL and Clock
Bus Control
Interrupt and Program Control
Pulse Width Modulator (PWM) Ports
Serial Peripheral Interface (SPI) Port 0
Serial Peripheral Interface (SPI) Port 1
Quadrature Decoder Port 0
Quadrature Decoder Port 1
Serial Communications Interface (SCI) Ports
CAN Ports
Analog-to-Digital Converter (ADC) Ports
Timer Module Ports
JTAG/Enhanced On-Chip Emulation (EOnCE)
Temperature Sense
Dedicated GPIO ( Address Bus = 11; Data Bus = 4
and as illustrated in
Table 1-1
DD
SS
or V
or V
DDA
SSA
1
for 56F8145 functional differences.
& V
)
)
PP
Functional Group
Table 2-1 Functional Group Pin Allocations
2
3
Figure
56F8345 Technical Data, Rev. 17
CAP
2-1. In
pins serve as 2.5V V
Table
4
)
2-2, each table row describes the signal or signals
DD_CORE
power inputs
56F8345
Number of Pins in Package
26
21
28
—
9
1
6
6
4
6
4
4
4
4
4
2
6
5
1
56F8145
13
21
28
—
—
—
9
1
6
6
4
6
4
4
4
4
4
4
5
Introduction
17