MC56F8345VFGE Freescale Semiconductor, MC56F8345VFGE Datasheet - Page 20

IC DSP 16BIT 60MHZ 128-LQFP

MC56F8345VFGE

Manufacturer Part Number
MC56F8345VFGE
Description
IC DSP 16BIT 60MHZ 128-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8345VFGE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
49
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
128-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
49
Data Ram Size
8 KB
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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2.2 Signal Pins
After reset, each pin is configured for its primary function (listed first). Any alternate functionality must
be programmed.
EMI is not functional in this package; since only part of the address/data bus is bonded out, use as GPIO
pins.
Note: Signals in italics are NOT available in the 56F8145 device.
If the “State During Reset” lists more than one state for a pin, the first state is the actual reset state. Other
states show the reset condition of the alternate function, which you get if the alternate pin function is
selected without changing the configuration of the alternate peripheral. For example, the A8/GPIOA0 pin
shows that it is tri-stated during reset. If the GPIOA_PER is changed to select the GPIO function of the
pin, it will become an input if no other registers are changed.
20
V
V
DDA_OSC_
DDA_ADC
V
V
V
V
V
V
V
Signal
Name
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
V
V
V
V
V
PLL
SS
SS
SS
SS
SS
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Pin No.
112
14
25
36
62
76
94
72
21
35
59
65
4
3
Supply
Supply
Supply
Supply
Type
56F8345 Technical Data, Rev. 17
During
Reset
State
I/O Power — This pin supplies 3.3V power to the chip I/O
interface and also the Processor core throught the on-chip
voltage regulator, if it is enabled.
ADC Power — This pin supplies 3.3V power to the ADC
modules. It must be connected to a clean analog power supply.
Oscillator and PLL Power — This pin supplies 3.3V power to
the OSC and to the internal regulator that in turn supplies the
Phase Locked Loop. It must be connected to a clean analog
power supply.
Ground — These pins provide ground for chip logic and I/O
drivers.
Signal Description
Freescale Semiconductor
Preliminary

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