MC56F8345VFGE Freescale Semiconductor, MC56F8345VFGE Datasheet - Page 38

IC DSP 16BIT 60MHZ 128-LQFP

MC56F8345VFGE

Manufacturer Part Number
MC56F8345VFGE
Description
IC DSP 16BIT 60MHZ 128-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8345VFGE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
49
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
128-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
49
Data Ram Size
8 KB
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Note:
3.2.3
The recommended method of connecting an external clock is illustrated in
source is connected to XTAL and the EXTAL pin is grounded.
external clock source as well.
3.3 Registers
When referring to the register definitions for the OCCS in the 56F8300 Peripheral User Manual, use the
register definitions without the internal Relaxation Oscillator, since the 56F8345/56F8145 devices do
NOT contain this oscillator.
Part 4 Memory Map
4.1 Introduction
The 56F8345 and 56F8145 devices are 16-bit motor-control chips based on the 56800E core. These parts
use a Harvard-style architecture with two independent memory spaces for Data and Program. On-chip
38
2 Terminal
CL1
The OCCS_COHL bit must be set to 0 when a ceramic resonator is used. The reset condition on the
OCCS_COHL bit is 0. Please see the COHL bit in the Oscillator Control (OSCTL) register, discussed
in the 56F8300 Peripheral User’s Manual.
External Clock Source
EXTAL XTAL
Figure 3-4 Connecting an External Clock Signal Register
R
z
CL2
Figure 3-3 Connecting a Ceramic Resonator
Resonator Frequency = 4 - 8MHz (optimized for 8MHz)
External
XTAL
Clock
3 Terminal
C1
EXTAL XTAL
56F8345 Technical Data, Rev. 17
EXTAL
V
R
SS
z
C2
Note: When using an external clocking
source with this configuration, the input
“CLKMODE” should be high and COHL bit in
the OSCTL register should be set to 1.
Sample External Ceramic Resonator Parameters:
R
z
= 750 KΩ
Set OCCS_COHL bit high when using an
CLKMODE = 0
Figure
3-4. The external clock
Freescale Semiconductor
Preliminary

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