MCF5249LAG120 Freescale Semiconductor, MCF5249LAG120 Datasheet - Page 210
MCF5249LAG120
Manufacturer Part Number
MCF5249LAG120
Description
IC MPU 32BIT COLDF 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF524xr
Datasheets
1.MCF5249LAG120.pdf
(2 pages)
2.MCF5249LAG120.pdf
(454 pages)
3.MCF5249LAG120.pdf
(16 pages)
4.MCF5249LAG120.pdf
(1 pages)
5.MCF5249LAG120.pdf
(8 pages)
Specifications of MCF5249LAG120
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
120MHz
Connectivity
I²C, IDE, MMC, SPI, UART/USART
Peripherals
DMA, I²S, POR, Serial Audio, WDT
Number Of I /o
34
Program Memory Type
ROMless
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
144-LQFP
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
120MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.8V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Maximum Clock Frequency
120 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Program Memory Size
8KB
Cpu Speed
120MHz
Embedded Interface Type
I2C, QSPI, UART
Digital Ic Case Style
LQFP
No. Of Pins
144
Rohs Compliant
Yes
For Use With
M5249C3 - KIT EVAL FOR M5249 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5249LAG120
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCF5249LAG120
Manufacturer:
FREESCALE
Quantity:
20 000
- MCF5249LAG120 PDF datasheet
- MCF5249LAG120 PDF datasheet #2
- MCF5249LAG120 PDF datasheet #3
- MCF5249LAG120 PDF datasheet #4
- MCF5249LAG120 PDF datasheet #5
- Current page: 210 of 454
- Download datasheet (7Mb)
/* second one more suitable for interrupt driven */
wait until ((FLASHMEDIACMD2 & 0xFFFF) == 0) OR
wait until (SHIFTBUSY2FALL event)
/* receive status from host */
wait until (SHIFTBUSY2RISE event) OR
wait until ((FLASHMEDIASTATUS & 8)!= 0)
RESPBITCOUNT = 46 or 134 /* depends on command */
FLASHMEDIACMD2 = 0xC00000 + RESPBITCOUNT;
while(RESPBITCOUNT > 0)
}
}
}
/* start sending data to card */
BLOCKCOUNT:= <N>
while(BLOCKCOUNT > 0)
}
}
}
FLASHMEDIACMD2 = 0;
{
if(FLASHMEDIADATA2 full)
{
-- start transmission of new block
DATABITCOUNT = <blockLen> + crcLen;
FLASHMEDIACMD1 = 0x260000 + dataBitCount +
while(DATABITCOUNT > 0)
wait until((FLASHMEDIACMD1 & 0xFFFF) == 0) OR
wait until (SHIFTBUSY1FALL event)
-- receive CRC status from card
wait until (SHIFTBUSY1RISE event) OR
wait until ((FLASHMEDIASTATUS & 2)!= 0)
FLASHMEDIACMD1 = 3;
wait until(FLASHMEDIADATA1 full)
CRC status = 0x7 & FLASHMEDIADATA1
FLASHMEDIACMD1 = 0x80000;
/* wait for interrupt now.
*/
wait until ((FLASHMEDIASTATUS & 4) == 0) /* busy end */
FLASHMEDIACMD1 = 0;
BLOCKCOUNT:= BLOCKCOUNT - 1;
{
read data from FLASHMEDIADATA2
RESPBITCOUNT:= RESPBITCOUNT - 32;
{
if(FLASHMEDIADATA1 empty)
On rising edge of busy, INTLEVEL1RISE event will
occur. On falling edge of busy, INTLEVEL1FALL event
will occur. During busy, (FLASHMEDIASTATUS & 4) == 4
{
write data to FLASHMEDIADATA1
DATABITCOUNT = DATABITCOUNT - 32;
wide_shift_mask;
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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