MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 117

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
2. These registers are reset to zero. Two bus clock cycles after reset release the register values are updated with the associated
2.3.11
Freescale Semiconductor
Function
Address 0x0008 (PRR)
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
pin values.
Altern.
Field
Reset
7-2
PE
PE
PE
1
0
W
R
Port E general purpose input/output data—Data Register
Port E bits 7 through 0 are associated with external bus control signals and interrupt inputs. These include mode
select (MODB, MODA), E clock, double frequency E clock, Instruction Tagging High and Low (TAGHI, TAGLO),
Read/Write (RW), Read Enable and Write Enable (RE, WE), Lower Data Select (LDS).
When not used with the alternative functions, Port E pins 7-2 can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
Pins 6 and 5 are inputs with enabled pull-down devices while RESET pin is low.
Pins 7 and 3 are inputs with enabled pull-up devices while RESET pin is low.
Port E general purpose input data and interrupt—Data Register, IRQ input.
This pin can be used as general purpose and IRQ input.
Port E general purpose input data and interrupt—Data Register, XIRQ input.
This pin can be used as general purpose and XIRQ input.
ECLKX2
XCLKS
Port E Data Register (PORTE)
PE7
or
0
7
= Unimplemented or Reserved
TAGHI
MODB
PE6
or
0
6
Table 2-12. PORTE Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-9. Port E Data Register (PORTE)
TAGLO
MODA
PE5
RE
or
or
0
5
ECLK
PE4
0
4
Description
EROMCTL
LSTRB
PE3
LDS
or
or
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
PE2
RW
WE
or
0
2
Access: User read/write
PE1
IRQ
1
(2)
XIRQ
PE0
0
2
117
(1)

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