MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 124

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.19
2.3.20
124
Function
Address 0x0032 (PRR)
Address 0x0033 (PRR)
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
Altern.
Field
Reset
Reset
7-0
PK
W
W
R
R
ROMCTL
Port K general purpose input/output data—Data Register
Port K pins 7 through 0 are associated with external bus control signals and internal memory expansion emulation
pins. These include ADDR[22:16], Access Source (ACC[2:0]), External Wait (EWAIT) and instruction pipe signals
IQSTAT[3:0]. Bits 6-0 carry the external addresses in all expanded modes. In emulation modes the address is
multiplexed with the alternate functions ACC and IQSTAT on the respective pins.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
DDRK7
EWAIT
Port K Data Register (PORTK)
Port K Data Direction Register (DDRK)
PK7
or
0
0
7
7
ADDR22
DDRK6
ACC2
PK6
mux
0
0
6
6
Figure 2-18. Port K Data Direction Register (DDRK)
Table 2-18. PORTK Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-17. Port K Data Register (PORTK)
ADDR21
DDRK5
ACC1
PK5
mux
0
0
5
5
ADDR20
DDRK4
ACC0
PK4
mux
0
0
4
4
Description
IQSTAT3
ADDR19
DDRK3
PK3
mux
3
0
3
0
IQSTAT2
ADDR18
DDRK2
PK2
mux
0
0
2
2
IQSTAT1
Access: User read/write
Access: User read/write
ADDR17
Freescale Semiconductor
DDRK1
PK1
mux
0
0
1
1
IQSTAT0
ADDR16
DDRK0
PK0
mux
0
0
0
0
(1)
(1)

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