MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 130

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1. Read: Anytime.
1. Read: Anytime.
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.30
2.3.31
130
Address 0x0249
Address 0x024A
Write:Never, writes to this register have no effect.
Write: Anytime.
Field
Field
PTIS
PTS
PTS
Reset
Reset
7-0
1
0
W
W
R
R
Port S general purpose input/output data—Data Register
Port S pin 3 is associated with the TXD signal of the SCI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port S general purpose input/output data—Data Register
Port S bits 2 is associated with the RXD signal of the SCI0 module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port S input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
DDRS7
PTIS7
Port S Input Register (PTIS)
Port S Data Direction Register (DDRS)
u
0
7
7
= Unimplemented or Reserved
DDRS6
PTIS6
Table 2-26. PTS Register Field Descriptions (continued)
u
0
6
6
Figure 2-29. Port S Data Direction Register (DDRS)
Table 2-27. PTIS Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-28. Port S Input Register (PTIS)
DDRS5
PTIS5
u
0
5
5
DDRS4
PTIS4
u
0
4
4
Description
Description
u = Unaffected by reset
DDRS3
PTIS3
3
u
3
0
DDRS2
PTIS2
u
0
2
2
Access: User read/write
Freescale Semiconductor
DDRS1
PTIS1
u
0
1
1
Access: User read
DDRS0
PTIS0
u
0
0
0
(1)
(1)

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