MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 202

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 3 Memory Mapping Control (S12XMMCV4)
3.3.2.4
Read: Anytime
Write: anytime in special modes, one time only in other modes.
This register determines the position of the 256 Byte direct page within the memory map.It is valid for both
global and local mapping scheme.
Bits [22:16] of the global address will be formed by the GPAGE[6:0] bits in case the CPU executes a global
instruction in direct addressing mode or by the appropriate local address to the global address expansion
(refer to
202
Address: 0x0011
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
DP[15:8]
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
7–0
W
R
Section 3.4.2.1.1, “Expansion of the Local Address
MOVB
LDY
DP15
Direct Page Index Bits 15–8 — These bits are used by the CPU when performing accesses using the direct
addressing mode. The bits from this register form bits [15:8] of the address (see
Example 3-2. This example demonstrates usage of the Direct Addressing Mode
Direct Page Register (DIRECT)
0
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Bit22
#0x80,DIRECT
<00
DP14
0
6
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 3-10. DIRECT Field Descriptions
Figure 3-9. DIRECT Address Mapping
Figure 3-8. Direct Register (DIRECT)
Bit16
DP13
Global Address [22:0]
5
0
;Set DIRECT register to 0x80. Write once only.
;Global data accesses to the range 0xXX_80XX can be direct.
;Logical data accesses to the range 0x80XX are direct.
;Load the Y index register from 0x8000 (direct access).
;< operator forces direct access on some assemblers but in
Bit15
CAUTION
DP12
DP [15:8]
0
4
Description
CPU Address [15:0]
Bit8
DP11
Map).
0
3
Bit7
DP10
2
0
Figure
Freescale Semiconductor
Bit0
DP9
3-9).
0
1
DP8
0
0

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