MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 252

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 5 External Bus Interface (S12XEBIV4)
5.4
This section describes the functions of the external bus interface. The availability of external signals and
functions in relation to the operating mode is initially summarized and described in more detail in separate
sub-sections.
5.4.1
A summary of the external bus interface functions for each operating mode is shown in
252
EXSTR1[2:0]
EXSTR0[2:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
unimplemented area
visible externally
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
address access
Internal access
Field
PRR access
6–4
2–0
(if Enabled)
Properties
access
External
and
Functional Description
Operating Modes and External Bus Properties
(2)
External Access Stretch Option 1 Bits 2, 1, 0 — This three bit field determines the amount of additional clock
stretch cycles on every access to the external address space as shown in
External Access Stretch Option 0 Bits 2, 1, 0 — This three bit field determines the amount of additional clock
stretch cycles on every access to the external address space as shown in
(1)
write internal
Single-Chip
read internal
2 cycles
Normal
Single-Chip Modes
Table 5-8. External Access Stretch Bit Definition
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 5-7. EBICTL1 Field Descriptions
EXSTRx[2:0]
Table 5-9. Summary of Functions
write internal
Single-Chip
read internal
2 cycles
Special
000
001
010
011
100
101
110
111
Timing Properties
Max. of 2 to 9
or n cycles of
write internal
read internal
programmed
Number of Stretch Cycles
Expanded
ext. wait
2 cycles
Normal
cycles
Description
(3)
1
2
3
4
5
6
7
8
write int & ext
read external
Single-Chip
Emulation
2 cycles
1 cycle
1 cycle
Expanded Modes
Table
Table
Max. of 2 to 9
write int & ext
read external
or n cycles of
programmed
5-8.
5-8.
Emulation
Expanded
ext. wait
2 cycles
1 cycle
cycles
Freescale Semiconductor
3
Table
write internal
read internal
5-9.
2 cycles
Special
1 cycle
1 cycle
Test

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