MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 364

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 10 XGATE (S12XGATEV3)
Module Base +0x0002
Read: Anytime
Write: In Debug Mode
10.3.1.3
The XGATE Channel Priority Level Register
In debug mode this register can be used to select a priority level when launching a thread (see
Section 10.6.1, “Debug
Module Base +0x0003
Read: Anytime
Write: In Debug Mode
10.3.1.4
The XGATE Initial Stack Pointer Select Register
to address “Module Base +0x0006”. A value of zero selects the Vector Base Register (XGVBR). Setting
1. Refer to
364
XGCHID[6:0]
XGCHPL[2:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Reset
Reset
Field
Field
6–0
2-0
W
W
R
R
Section 10.6.1, “Debug
Request Identifier — ID of the currently active channel
Priority Level— Priority level of the currently active channel
XGATE Channel Priority Level (XGCHPL)
XGATE Initial Stack Pointer Select Register (XGISPSEL)
0
0
0
0
7
7
Figure 10-5. XGATE Channel Priority Level Register (XGCHPL)
1
1
Features”).
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
6
6
Figure 10-4. XGATE Channel ID Register (XGCHID)
Features”
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 10-4. XGCHPL Field Descriptions
Table 10-3. XGCHID Field Descriptions
0
0
0
5
5
(Figure
(Figure
0
0
0
4
4
Description
10-5) shows the priority level of the current thread.
Description
XGCHID[6:0]
10-6) determines the register which is mapped
0
0
0
3
3
0
0
2
2
XGCHPL[2:0]
Freescale Semiconductor
0
0
1
1
0
0
0
0

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