MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 525

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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13.4
The ADC12B16C is structured into an analog sub-block and a digital sub-block.
13.4.1
The analog sub-block contains all analog electronics required to perform a single conversion. Separate
power supplies V
13.4.1.1
The Sample and Hold (S/H) Machine accepts analog signals from the external world and stores them as
capacitor charge on a storage node.
During the sample process the analog input connects directly to the storage node.
The input analog signals are unipolar and must fall within the potential range of V
During the hold process the analog input is disconnected from the storage node.
13.4.1.2
The analog input multiplexer connects one of the 16 external analog input channels to the sample and hold
machine.
13.4.1.3
The A/D Machine performs analog to digital conversions. The resolution is program selectable at either 8
or 10 or 12 bits. The A/D machine uses a successive approximation architecture. It functions by comparing
the stored analog sample potential with a series of digitally generated analog potentials. By following a
binary search algorithm, the A/D machine locates the approximating potential that is nearest to the
sampled potential.
When not converting the A/D machine is automatically powered down.
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Functional Description
Analog Sub-Block
Sample and Hold Machine
Analog Input Multiplexer
Analog-to-Digital (A/D) Machine
DDA
and V
Table 13-22. Conversion result mapping to ATDDRn
SSA
resolution
MC9S12XE-Family Reference Manual Rev. 1.23
10-bit data
10-bit data
12-bit data
8-bit data
8-bit data
allow to isolate noise of other MCU circuitry from the analog sub-block.
A/D
0
1
0
1
X
DJM
conversion result mapping to
Bit[11:4] = result, Bit[3:0]=0000
Bit[7:0] = result, Bit[11:8]=0000
Bit[11:2] = result, Bit[1:0]=00
Bit[9:0] = result, Bit[11:10]=00
Bit[11:0] = result
ATDDRn
Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
SSA
to V
DDA
.
525

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