MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 542

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
14.3.2.8
Read or write: Anytime
All bits reset to zero.
542
Module Base + 0x0008
Module Base + 0x0009
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
7, 5, 3, 1
6, 4, 2, 0
OM[7:0]
OL[7:0]
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
W
W
R
R
OM7
OM3
OMx — Output Mode
OLx — Output Level
These eight pairs of control bits are encoded to specify the output action to be taken as a result of a successful
OCx compare. When either OMx or OLx is one, the pin associated with OCx becomes an output tied to OCx.
See
Timer Control Register 1/Timer Control Register 2 (TCTL1/TCTL2)
0
0
7
7
To enable output action by OMx and OLx bits on timer port, the
corresponding bit in OC7M should be cleared. The settings for these bits can
be seen in
Table
14-10.
OMx
OL7
OL3
Table 14-11
0
0
6
6
0
0
1
1
Figure 14-11. Timer Control Register 1 (TCTL1)
Figure 14-12. Timer Control Register 2 (TCTL2)
Table 14-9. TCTL1/TCTL2 Field Descriptions
Table 14-10. Compare Result Output Action
MC9S12XE-Family Reference Manual Rev. 1.23
OM6
OM2
OLx
0
1
0
1
5
0
5
0
No output compare
action on the timer output signal
Toggle OCx output line
Clear OCx output line to zero
Set OCx output line to one
OL6
OL2
NOTE
0
0
4
4
Description
OM5
OM1
Action
0
0
3
3
OL5
OL1
2
0
2
0
Freescale Semiconductor
OM4
OM0
0
0
1
1
OL4
OL0
0
0
0
0

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