MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 667

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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17.3.0.3
Read: Anytime
Write: Anytime
17.3.0.4
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0002
Module Base + 0x0003
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
PFLT[7:0]
PCE[7:0]
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
Field
7:0
7:0
W
W
R
R
PMUX7
PCE7
PIT Force Load Bits for Timer 7-0 — These bits have only an effect if the corresponding timer channel (PCE
set) is enabled and if the PIT module is enabled (PITE set). Writing a one into a PFLT bit loads the corresponding
16-bit timer load register into the 16-bit timer down-counter. Writing a zero has no effect. Reading these bits will
always return zero.
PIT Enable Bits for Timer Channel 7:0 — These bits enable the PIT channels 7-0. If PCE is cleared, the PIT
channel is disabled and the corresponding flag bit in the PITTF register is cleared. When PCE is set, and if the
PIT module is enabled (PITE = 1) the 16-bit timer counter is loaded with the start count value and starts down-
counting.
0 The corresponding PIT channel is disabled.
1 The corresponding PIT channel is enabled.
PIT Channel Enable Register (PITCE)
PIT Multiplex Register (PITMUX)
0
0
7
7
PMUX6
PCE6
0
0
6
6
Figure 17-5. PIT Channel Enable Register (PITCE)
Figure 17-6. PIT Multiplex Register (PITMUX)
MC9S12XE-Family Reference Manual Rev. 1.23
Table 17-3. PITFLT Field Descriptions
Table 17-4. PITCE Field Descriptions
PMUX5
PCE5
5
0
5
0
PMUX4
PCE4
0
0
4
4
Description
Description
PMUX3
PCE3
0
0
3
3
Chapter 17 Periodic Interrupt Timer (S12PIT24B8CV2)
PMUX2
PCE2
2
0
2
0
PMUX1
PCE1
0
0
1
1
PMUX0
PCE0
0
0
0
0
667

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