MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 798

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 22 Timer Module (TIM16B8CV2) Block Description
22.3.2.4
Read: Anytime
Write: Anytime
22.3.2.5
The 16-bit main timer is an up counter.
A full access for the counter register should take place in one clock cycle. A separate read/write for high
byte and low byte will give a different result than accessing them as a word.
Read: Anytime
798
Module Base + 0x0003
Module Base + 0x0004
Module Base + 0x0005
OC7D[7:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
7:0
W
W
W
R
R
R
TCNT15
OC7D7
TCNT7
Output Compare 7 Data — A channel 7 event, which can be a counter overflow when TTOV[7] is set or a
successful output compare on channel 7, can cause bits in the output compare 7 data register to transfer to the
timer port data register depending on the output compare 7 mask register.
Output Compare 7 Data Register (OC7D)
Timer Count Register (TCNT)
15
0
0
0
7
7
TCNT14
OC7D6
TCNT6
14
0
0
0
6
6
Figure 22-9. Output Compare 7 Data Register (OC7D)
Figure 22-10. Timer Count Register High (TCNTH)
Figure 22-11. Timer Count Register Low (TCNTL)
MC9S12XE-Family Reference Manual Rev. 1.23
Table 22-5. OC7D Field Descriptions
TCNT13
OC7D5
TCNT5
13
5
0
0
5
0
TCNT12
OC7D4
TCNT4
12
0
0
0
4
4
Description
TCNT11
OC7D3
TCNT3
11
0
0
0
3
3
TCNT10
OC7D2
TCNT2
10
2
0
0
2
0
OC7D1
Freescale Semiconductor
TCNT9
TCNT1
0
0
0
1
9
1
OC7D0
TCNT8
TCNT0
0
0
0
0
9
0

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