MC9S12XEP100CAL Freescale Semiconductor, MC9S12XEP100CAL Datasheet - Page 861

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100CAL

Manufacturer Part Number
MC9S12XEP100CAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 12-bit
Package
112LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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fault information will be recorded until the specific ECC fault flag has been cleared. In the event of
simultaneous ECC faults, the priority for fault recording is:
All FECCR bits are readable but not writable.
Freescale Semiconductor
Offset Module Base + 0x000E
Offset Module Base + 0x000F
Reset
Reset
1. Double bit fault over single bit fault
2. CPU over XGATE
W
W
R
R
0
0
7
7
ECCRIX[2:0]
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 24-21. Flash ECC Error Results Low Register (FECCRLO)
Figure 24-20. Flash ECC Error Results High Register (FECCRHI)
000
001
010
011
100
101
110
111
0
0
6
6
MC9S12XE-Family Reference Manual , Rev. 1.23
Parity bits read from
Table 24-27. FECCR Index Settings
Flash block
Bits [15:8]
0
0
5
5
Not used, returns 0x0000 when read
Not used, returns 0x0000 when read
Data 1 [15:0] (P-Flash only)
Data 2 [15:0] (P-Flash only)
Data 3 [15:0] (P-Flash only)
FECCR Register Content
0
0
4
4
ECCR[15:8]
Global address [15:0]
ECCR[7:0]
CPU or XGATE
source identity
Data 0 [15:0]
Bit[7]
Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
0
0
3
3
Global address
0
0
2
2
Bits[6:0]
[22:16]
0
0
1
1
0
0
0
0
861

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