MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 162

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
2 902
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
800
Part Number:
MC912DG128AMPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC912DG128AMPVE
Manufacturer:
FREESCALE
Quantity:
800
Clock Functions
Technical Data
162
for the base clock. See
the source for the base clock and the LOCK bit is clear, the PLL has
suffered a severe noise hit and the software must take appropriate
action, depending on the application.
The following conditions apply when the PLL is in automatic bandwidth
control mode:
The PLL also can operate in manual mode (AUTO = 0). All LOCK
features described above are active in this mode, only the bandwidth
control is disabled. Manual mode is used mainly for systems operating
under harsh conditions (e.g.uncoated PCBs in automotive
environments). When this is the case, the PLL is likely to remain in
acquisition mode. The following conditions apply when in manual mode:
Freescale Semiconductor, Inc.
For More Information On This Product,
The ACQ bit is a read-only indicator of the mode of the filter.
The ACQ bit is set when the VCO frequency is within a certain
tolerance, ∆
certain tolerance, ∆
The LOCK bit is a read-only indicator of the locked state of the PLL.
The LOCK bit is set when the VCO frequency is within a certain
tolerance, ∆
a certain tolerance, ∆
CPU interrupts can occur if enabled (LOCKIE = 1) when the lock
condition changes, toggling the LOCK bit.
ACQ is a writable control bit that controls the mode of the filter.
Before turning on the PLL in manual mode, the ACQ bit must be
clear.
In case tracking is desired (ACQ = 1), the software must wait a
given time, tacq, after turning on the PLL by setting PLLON in the
PLL control register. This is to avoid switching to tracking mode
too early while the XFC voltage level is still too far away from its
quiescent value corresponding to the target frequency. This
operation would be very detrimental to the stabilization time.
Go to: www.freescale.com
Clock Functions
trk
Lock
, and is cleared when the VCO frequency is out of a
, and is cleared when the VCO frequency is out of
Clock Divider
unt
unl
. See 19 Electrical Characteristics.
. See 19 Electrical Characteristics.
Chains. If the VCO is selected as
MC68HC912DT128A — Rev 4.0
MOTOROLA

Related parts for MC912DG128AMPVE