MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 164

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer:
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Part Number:
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Manufacturer:
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Quantity:
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Clock Functions
Technical Data
164
EXTALi
Clock Monitor Fail
13-stage counter
(Clocked by XCLK)
Limp-Home
BCSP
SYSCLK
Figure 12-3. Clock Loss during Normal Operation
VCO clock at its minimum frequency, f
clock, allowing the MCU to continue operating.
The MCU is said to be operating in “limp-home” mode with the forced
VCO clock as the system clock. PLLON and BCSP (‘bus clock select
PLL’) signals are forced high and the MCS (‘module clock select’) signal
is forced low. The LHOME flag in the PLLFLG register is set to indicate
that the MCU is running in limp-home mode. A change of this flag sets
the limp-home interrupt flag, LHIF, and if enabled by the LHIE bit, the
limp-home mode interrupt is requested. The Clock Monitor is enabled
irrespective of CME and FCME bit settings. Module clocks to the RTI &
COP (XCLK), BDM (BCLK) and ECT & SCI (MCLK) are forced to be
PCLK (at f
select is unaffected.
The clock monitor is polled each time the 13-stage free running counter
reaches a count of 4096 XCLK cycles i.e. mid-count, hence the clock
status gets checked once every 8192 XCLK cycles. When the presence
of an external clock is detected, the MCU exits limp-home mode,
clearing the LHOME flag and setting the limp-home interrupt flag. Upon
leaving limp-home mode, BCSP and MCS signals are restored to their
Freescale Semiconductor, Inc.
For More Information On This Product,
0 --> 4096
A
VCOMIN
Go to: www.freescale.com
PLLCLK (Limp-Home)
Clock Functions
) and ECLK is also equal to f
0 --> 4096
B
VCOMIN
Restore PLLCLK or EXTALi
MC68HC912DT128A — Rev 4.0
Restore BCSP
,
is provided as the system
VCOMIN
.
MSCAN clock
MOTOROLA

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