MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 260

• Manufacturer Part Number: MC912DG128AMPVE
• Description: IC MCU 128K FLASH 8MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912DG128AMPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TC6 — Timer Input Capture/Output Compare Register 6
PACTL — 16-Bit Pulse Accumulator A Control Register
TC4 — Timer Input Capture/Output Compare Register 4
TC5 — Timer Input Capture/Output Compare Register 5
TC7 — Timer Input Capture/Output Compare Register 7
Enhanced Capture Timer
Technical Data
260
RESET:
Bit 15
Bit 15
Bit 15
Bit 15
BIT 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
PAEN
14
14
14
14
6
6
6
0
6
6
6
6
6
6
Depending on the TIOS bit for the corresponding channel, these
registers are used to latch the value of the free-running counter when a
defined transition is sensed by the corresponding input capture edge
detector or to trigger an output action for output compare.
Read anytime. Write anytime for output compare function. Writes to
these registers have no meaning or effect during input capture. All timer
input capture/output compare registers are reset to $0000.
16-Bit Pulse Accumulator A (PACA) is formed by cascading the 8-bit
pulse accumulators PAC3 and PAC2.
When PAEN is set, the PACA is enabled. The PACA shares the input pin
with IC7.
Read: any time
Write: any time
Freescale Semiconductor, Inc.
For More Information On This Product,
PAMOD
13
13
13
13
5
5
5
5
5
5
5
5
5
0
Go to: www.freescale.com
Enhanced Capture Timer
PEDGE
12
12
12
12
4
4
4
4
4
4
4
4
4
0
CLK1
11
11
11
11
3
3
3
3
3
3
3
3
3
0
CLK0
10
10
10
10
2
2
2
2
2
2
2
2
2
0
MC68HC912DT128A — Rev 4.0
PAOVI
1
9
1
1
9
1
1
9
1
1
9
1
1
0
BIT 0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 8
Bit 0
PAI
0
$009C–$009D
$009A–$009B
$009E–$009F
$0098–$0099
MOTOROLA
$00A0