MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 299

• Manufacturer Part Number: MC912DG128AMPVE
• Description: IC MCU 128K FLASH 8MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912DG128AMPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DDRS — Data Direction Register for Port S
PORTS — Port S Data Register
16.6 Port S
MC68HC912DT128A — Rev 4.0
MOTOROLA
RESET:
RESET:
MSI
DDS7
Bit 7
Bit 7
PS7
CS
SS
0
-
DDS6
SCK
PS6
6
0
6
-
some slave devices are very simple and either accept data from the
master without returning data to the master or pass data to the master
without requiring data from the master.
In all modes, port S bits PS[7:0] can be used for either general-purpose
I/O, or with the SCI and SPI subsystems. During reset, port S pins are
configured as high-impedance inputs (DDRS is cleared).
Read anytime (inputs return pin level; outputs return pin driver input
level). Write data stored in internal latch (drives pins only if configured for
output). Writes do not change pin state when pin configured for SPI or
SCI output.
After reset all bits are configured as general-purpose inputs.
Port S shares function with the on-chip serial systems (SPI and SCI0/1).
Read or write anytime.
After reset, all general-purpose I/O are configured for input only.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Configure the corresponding I/O pin for input only
1 = Configure the corresponding I/O pin for output
MOMI
DDS5
MOSI
PS5
5
0
5
-
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Multiple Serial Interface
DDS4
MISO
SISO
PS4
4
4
0
-
DDS3
TXD1
PS3
3
3
0
-
RXD1
DDS2
PS2
2
2
0
-
TXD0
DDS1
PS1
1
1
0
-
Multiple Serial Interface
RXD0
DDS0
Bit 0
PS0
Bit 0
-
0
Technical Data
$00D7
$00D6
Port S
299