MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 337

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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18.7 Protocol Violation Protection
MC68HC912DT128A — Rev 4.0
MOTOROLA
The msCAN12 will protect the user from accidentally violating the CAN
protocol through programming errors. The protection logic implements
the following features:
Freescale Semiconductor, Inc.
For More Information On This Product,
The receive and transmit error counters cannot be written or
otherwise manipulated.
All registers which control the configuration of the msCAN12 can
not be modified while the msCAN12 is on-line. The SFTRES bit in
CMCR0 (see
serves as a lock to protect the following registers:
– msCAN12 module control register 1 (CMCR1)
– msCAN12 bus timing register 0 and 1 (CBTR0, CBTR1)
– msCAN12 identifier acceptance control register (CIDAC)
– msCAN12 identifier acceptance registers (CIDAR0–7)
– msCAN12 identifier mask registers (CIDMR0–7)
The TxCAN pin is forced to recessive when the msCAN12 is in any
of the low power modes.
Interrupts
Function
Wake-Up
Transmit
Receive
Error
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Table 18-1. msCAN12 Interrupt Vectors
MSCAN Controller
msCAN12 Module Control Register
RWRNIF
TWRNIF
RERRIF
TERRIF
BOFFIF
Source
WUPIF
OVRIF
TXE0
TXE1
TXE2
RXF
Local Mask
RWRNIE
TWRNIE
RERRIE
TERRIE
BOFFIE
TXEIE0
TXEIE1
TXEIE2
WUPIE
OVRIE
RXFIE
Protocol Violation Protection
Global Mask
(CMCR0))
MSCAN Controller
Technical Data
I Bit
337

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