MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 372

IC MCU 128K FLASH 8MHZ 112-LQFP

MC912DG128AMPVE

Manufacturer Part Number
MC912DG128AMPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912DG128AMPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Analog-to-Digital Converter
19.5 ATD Operational Modes
19.5.1 Power Down Mode
Technical Data
372
programmable constant in order to generate the ATD module’s internal
clock. One additional benefit of the prescaled clock feature is that it
allows the user further control over the sample period (note that
changing the module clock also affects conversion time).
The prescaler is based on a 5 bit modulus counter and divides the PCLK
by an integer value between 1 and 32. The final clock frequency is
obtained with a further division by 2.
The internal ATD module clock and the system PCLK have a direct
phase relationship, however the ATD module operates as if it is
effectively asynchronous to MCU bus clock cycles.
The ATD module can be powered down under program control. This is
done by turning the clock signals off to the digital electronics of the
module and eliminating the quiescent current draw of the analog
electronics.
Power down control is implemented in one of three ways.
Note that the reset default for the ADPU bit is zero. Therefore, when this
module is reset, it is reset into the power down state.
Once the command to power down has been received, the ATD module
aborts any conversion sequence in progress and enters lower power
mode. When the module is powered up again, the bias settings in the
analog electronics must be given time to stabilize before conversions
1. Using the ADPU bit in control register ATDCTL2.
2. When STOP instruction is executed, the module will power down
3. If the module WAIT enable bit (ASWAI) is set and a WAIT
Freescale Semiconductor, Inc.
For More Information On This Product,
for the duration of the STOP function.
instruction is executed, the module will power down for the
duration of the WAIT function.
Analog-to-Digital Converter
Go to: www.freescale.com
MC68HC912DT128A — Rev 4.0
MOTOROLA

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