MC912DG128AMPVE Freescale Semiconductor, MC912DG128AMPVE Datasheet - Page 382

• Manufacturer Part Number: MC912DG128AMPVE
• Description: IC MCU 128K FLASH 8MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912DG128AMPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ATD0CTL4/ATD1CTL4 — ATD Control Register 4
Analog-to-Digital Converter
19.9.3 ATDCTL4 ATD Control Register 4
Technical Data
382
RESET:
RES10
Bit 7
0
SMP1
6
0
FRZ1, FRZ0 — Background Debug Freeze Enable
ATD control register 4 is used to select the internal ATD clock frequency
(based on the system clock), select the length of the third phase of the
sample period, and set the resolution of the A/D conversion (i.e. 8-bits or
10-bits). All writes to this register have an immediate effect. If a
conversion is in progress, the entire conversion sequence is aborted. A
write to this register (or ATDCTL5) initiates a new conversion sequence.
Finally, which result registers hold valid data can be tracked using the
conversion complete flags. Fast flag clear mode may or may not be
useful in a particular application to track valid data.
Background debug freeze function allows the ATD module to pause
when a breakpoint is encountered.
FRZ0 determine the ATD’s response to a breakpoint. When BDM is
deasserted, the ATD module continues operating as it was before the
breakpoint occurred.
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 19-3. ATD Response to Background Debug Enable
SMP0
FRZ1
5
0
0
0
1
1
Analog-to-Digital Converter
Go to: www.freescale.com
FRZ0
PRS4
0
1
0
1
4
0
Continue conversions in active background mode
PRS3
3
0
Finish current conversion, then freeze
Freeze when BDM is active
PRS2
Table 19-3
2
0
ATD Response
Reserved
MC68HC912DT128A — Rev 4.0
PRS1
1
0
shows how FRZ1 and
PRS0
Bit 0
1
$0064/$01E4
MOTOROLA