M30833FJGP#U3 Renesas Electronics America, M30833FJGP#U3 Datasheet - Page 526
M30833FJGP#U3
Manufacturer Part Number
M30833FJGP#U3
Description
IC M32C/83 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30833FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
32 MHz
Operating Supply Voltage
5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
87
Interface Type
UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Rev.
REVISION HISTORY
Date
274, 275 • Table 21.7 Pin Settings for Waveform Generation Function PSL3 register
141-156
Page
120
126
140
139
173
175
176
177
191
192
204
221
225
242
250
296
297
299
304
• Figure 12.5 DMA0 to DMA Registers Notes 3 and 4 modified; DSA0 to DSA3
DMACII
• Figure 13.1 RLVL Register Note 3 modified
• 13.4.2 Burst Transfer partially added
Timer
• Figure 14.7 TCSPR Register Note 2 added
• Table 14.4 Specification in Event Counter Mode (when not processing two -
Serial I/O
• Figure 16.1 UARTi Block Diagram modified between transmit control circuit
• Figure 16.3 U0BRG to U4BRG Registers Note 3 added
• Figure 16.4 U0C0 to U4C0 Registers Note 4 added
• Figure 16.5 U0C1 to U4C1 Register and U0SMR to U4SMR Registers
RI bit revised
• Figure 16.14 Transmit Operation Timing modified
• 16.2.1 Bit Rate added
• Table 16.19 Special Mode 2 Specifications Transmit Start Condition modified;
• Figure 16.29 SIM Interface Operation Timing modified
A/D Converter
• Table 17.1 A/D Converter Specifications Note 3 added
D/A Converter
• Figure 18.3 D/A Converter Equivalent Circuit modified
Intelligent I/O
• Figure 21.2 Intelligent I/O Group 1 Block Diagram modified
• Table 21.16 Clock Synchronous Serial I/O Mode Specifications (Groups 0
• Table 21.19 Pin Settings (2) Bit and Setting modified for the PD8 register
• Table 21.22 UART Mode Specifications Specification for interrupt request
• Table 21.28 HDLC Processing Mode Specifications Specification for interrupt
Registers Notes 3 and 4 modified
phase pulse signal) to Table 14.7 Specifications in Pulse Width Modulation
Mode; Table 14.9 Specifiations in Timer Mode and Table 14.10
Specifications in Event Counter Mode Condition for “Write to Timer” modified
and CTSi/RTSi pins
Specification for Error Detection partially added
added
and 1) Specification for interrupt request modified
modified
request modified
________ ________
M32C/83 GROUP (M32C/83, M32C/83T) Hardware Manual
C-13
Description
Summary
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