M30833FJGP#U3 Renesas Electronics America, M30833FJGP#U3 Datasheet - Page 163
M30833FJGP#U3
Manufacturer Part Number
M30833FJGP#U3
Description
IC M32C/83 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30833FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
R8C
Maximum Speed
32 MHz
Operating Supply Voltage
5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
87
Interface Type
UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R
R
e
E
v
STCTX
[ Syntax ]
[ Operation ]
[ Function ]
[ Flag Change ]
[ Description Example ]
J
Chapter 3
1 .
Change
0
9
STCTX
0 .
Flag
B
• This instruction saves task context to the stack area.
• Set the RAM address that contains the task number in abs16 and the start address of table data in abs24.
• The required register information is specified from table data by the task number and the data in the
• Information on transferred registers is configured as shown below. Logic 1 indicates a register to be
• The table data is comprised as shown below. The address indicated by abs24 is the base address of
STCTX
0
0
stack area is transferred to each register according to the specified register information. Then the SP
correction value is subtracted to the stack pointer (SP). For this SP correction value, set the number of
bytes you want to be transferred. Calculated as 2 bytes when transferring the R0, R1, R2, or R3
registers. A0, A1, SB, and FB are calculated as 4 bytes.
transferred and logic 0 indicates a register that is not transferred.
the table. The data stored at an address apart from the base address as much as twice the content of
abs16 indicates register information, and the next address contains the stack pointer correction value.
3
1
2
abs24
9
0
0 -
0
U
6
1
0 .
0
0
5
3 .
I
Functions
1
Direction in
which address
increases
abs16,abs24
Ram,Rom_TBL
Base address
of table
O
p
a
g
e
B
145
S
f o
3
Z
Register information for the task whose task number = n
3
SP correction value for the task whose task number = n
Register information for the task whose task number = 0.
Register information for the task whose task number = 1.
SP correction value for the task whose task number = 0.
SP correction value for the task whose task number = 1.
5
MSB
D
FB SB A1 A0 R3 R2 R1 R0
C
STore ConTeXt
Save context
(See the above diagram.)
(See the above diagram.)
(See the above diagram.)
[ Instruction Code/Number of Cycles ]
LSB
Transferred sequentially
beginning with FB
*1
.
*1
.
*1
abs16
STCTX
n=0 to 255
3.2
2
Page=
Functions
293
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