MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 123

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

3.1 RCPU Features
MPC555 / MPC556
USER’S MANUAL
The PowerPC-based RISC processor (RCPU) used in the MPC500 family of micro-
controllers integrates five independent execution units: an integer unit (IU), a load/
store unit (LSU), and a branch processing unit (BPU), floating-point unit (FPU) and in-
teger multiplier divider (IMD). The use of simple instructions with rapid execution times
yields high efficiency and throughput for MPC555 / MPC556-based systems.
Most integer instructions execute in one clock cycle. Instructions can complete out of
order for increased performance; however, the processor makes execution appear se-
quential.
This section provides an overview of the RCPU. For a detailed description of this pro-
cessor, refer to the
Major features of the RCPU include the following:
• High-performance microprocessor
• Five independent execution units and two register files
• Facilities for enhanced system performance
• In-system testability and debugging features
• High instruction and data throughput
— Single clock-cycle execution for many instructions
— Independent LSU for load and store operations
— BPU featuring static branch prediction
— A 32-bit IU
— Fully IEEE 754-compliant FPU for both single- and double-precision opera-
— Thirty-two general-purpose registers (GPRs) for integer operands
— Thirty-two floating-point registers (FPRs) for single- or double-precision oper-
— Programmable big- and little-endian byte ordering
— Atomic memory references
— Condition register (CR) look-ahead operations performed by BPU
— Branch-folding capability during execution (zero-cycle branch execution time)
— Programmable static branch prediction on unresolved conditional branches
— A pre-fetch queue that can hold up to four instructions, providing look-ahead
— Interlocked pipelines with feed-forwarding that control data dependencies in
tions
ands
capability
hardware
RCPU Reference Manual
Freescale Semiconductor, Inc.
For More Information On This Product,
CENTRAL PROCESSING UNIT
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
Rev. 15 October 2000
SECTION 3
(RCPURM/AD).
MOTOROLA
3-1