MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 146

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

DEC — Decrementer Register
SRR0 — Machine Status Save/Restore Register 0
MSB
MSB
3.9.6 Machine Status Save/Restore Register 0 (SRR0)
3.9.7 Machine Status Save/Restore Register 1 (SRR1)
MPC555
USER’S MANUAL
0
0
clock in the MPC555 / MPC556, refer to
MPC555 / MPC556 Internal Clock
ister
The DEC does not run after power-up and must be enabled by setting the TBE bit in
the TBSCR register, see
register. A decrementer exception may be signaled to software prior to initialization.
The machine status save/restore register 0 (SRR0) is a 32-bit register that identifies
where instruction execution should resume when an rfi instruction is executed follow-
ing an exception. It also holds the effective address of the instruction that follows the
System Call (sc) instruction.
When an exception occurs, SRR0 is set to point to an instruction such that all prior in-
structions have completed execution and no subsequent instruction has begun execu-
tion. The instruction addressed by SRR0 may not have completed execution,
depending on the exception type. SRR0 addresses either the instruction causing the
exception or the immediately following instruction. The instruction addressed can be
determined from the exception type and status bits.
When an exception occurs, SRR0 is set to point to an instruction such that all prior in-
structions have completed execution and no subsequent instruction has begun execu-
tion. The instruction addressed by SRR0 may not have completed execution,
depending on the exception type. SRR0 addresses either the instruction causing the
exception or the immediately following instruction. The instruction addressed can be
determined from the exception type and status bits.
SRR1 is a 32-bit register used to save machine status on exceptions and to restore
machine status when an rfi instruction is executed.
1
1
2
2
/
(SCCR).
3
3
MPC556
4
4
5
5
6
6
7
7
8
8
Freescale Semiconductor, Inc.
For More Information On This Product,
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Table
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
Rev. 15 October 2000
6-16. Power-on reset stops its counting and clears the
RESET: UNCHANGED
Decrementing Counter
RESET: UNDEFINED
Signals, and
SRR0
6.6 MPC555 / MPC556
8.12.1 System Clock Control Reg-
Decrementer,
MOTOROLA
SPR 22
SPR 26
3-24
8.6
LSB
LSB
31
31